ESP32 (QFN-48 (5×5 mm, D0WD-V3)) Pinout Diagram

Espressif's classic ESP32 integrates dual 240 MHz 32-bit Xtensa LX6 cores, an ultra-low-power coprocessor, 520 KB SRAM, 448 KB ROM, 2.4 GHz Wi-Fi 4, and dual-mode Bluetooth (Classic BR/EDR + BLE 4.2) in a 5×5 mm (or 6×6 mm) QFN-48 package. Thirty-four GPIOs (GPIO0–19, 21–23, 25–27, 32–39) support flexible GPIO Matrix routing for 3× UART, HSPI/VSPI, 2× I2C, 2× I2S, TWAI (CAN 2.0B), 16-channel LEDC, and 2× MCPWM units, plus 18× 12-bit SAR ADC inputs, 2× 8-bit DAC outputs (GPIO25/26), and 10 capacitive touch inputs. Note that GPIO34–GPIO39 are strictly input-only without internal pull resistors, ADC2 conflicts with Wi-Fi, and GPIO12 selects 3.3 V vs 1.8 V flash power at reset.

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Full Pin Reference (49 Pins)

Pin #	Label	Type	Functions	Warnings & Notes
1	VDDA	power	VDDA	Analog, RF, and PLL power supply (2.3V–3.6V, 3.3V nominal)
2	LNA_IN	special	LNA_IN	[INFO] 2.4 GHz RF LNA antenna input/output Dedicated 2.4 GHz RF port for Wi-Fi 4 and Classic BT / BLE. Requires an external impedance-matching network. 2.4 GHz RF low-noise amplifier input/output
3	VDD3P3	power	VDD3P3	Analog PA power supply (2.3V–3.6V, 3.3V nominal)
4	VDD3P3	power	VDD3P3	Analog PA power supply (2.3V–3.6V, 3.3V nominal)
5	SENSOR_VP GPIO36	mixed	GPIO36 ADC1_CH0	[CAUTION] Input-only pin — NO output driver and NO internal pull-up/pull-down resistors GPIO36 (RTC/ADC1 domain) can only be used as a digital or analog input. Provide an external pull-up or pull-down resistor if driven by an open-drain or mechanical switch. Input-only RTC/ADC1 GPIO36 (no output driver, no internal pull resistors, 3.3V max)
6	SENSOR_CAPP GPIO37	mixed	GPIO37 ADC1_CH1	[CAUTION] Input-only pin — NO output driver and NO internal pull-up/pull-down resistors GPIO37 (RTC/ADC1 domain) can only be used as a digital or analog input. Provide an external pull-up or pull-down resistor if driven by an open-drain or mechanical switch. Input-only RTC/ADC1 GPIO37 (no output driver, no internal pull resistors, 3.3V max)
7	SENSOR_CAPN GPIO38	mixed	GPIO38 ADC1_CH2	[CAUTION] Input-only pin — NO output driver and NO internal pull-up/pull-down resistors GPIO38 (RTC/ADC1 domain) can only be used as a digital or analog input. Provide an external pull-up or pull-down resistor if driven by an open-drain or mechanical switch. Input-only RTC/ADC1 GPIO38 (no output driver, no internal pull resistors, 3.3V max)
8	SENSOR_VN GPIO39	mixed	GPIO39 ADC1_CH3	[CAUTION] Input-only pin — NO output driver and NO internal pull-up/pull-down resistors GPIO39 (RTC/ADC1 domain) can only be used as a digital or analog input. Provide an external pull-up or pull-down resistor if driven by an open-drain or mechanical switch. Input-only RTC/ADC1 GPIO39 (no output driver, no internal pull resistors, 3.3V max)
9	CHIP_PU	reset	CHIP_PU	[CAUTION] Active-HIGH chip enable / reset — never leave floating High enables ESP32; Low powers off the chip. Connect an external 10 kΩ pull-up to 3.3V and 1 µF delay capacitor to GND. Active-HIGH chip enable / reset input (EN / CHIP_PU)
10	VDET_1 GPIO34	mixed	GPIO34 ADC1_CH6	[CAUTION] Input-only pin — NO output driver and NO internal pull-up/pull-down resistors GPIO34 (RTC/ADC1 domain) can only be used as a digital or analog input. Provide an external pull-up or pull-down resistor if driven by an open-drain or mechanical switch. Input-only RTC/ADC1 GPIO34 (no output driver, no internal pull resistors, 3.3V max)
11	VDET_2 GPIO35	mixed	GPIO35 ADC1_CH7	[CAUTION] Input-only pin — NO output driver and NO internal pull-up/pull-down resistors GPIO35 (RTC/ADC1 domain) can only be used as a digital or analog input. Provide an external pull-up or pull-down resistor if driven by an open-drain or mechanical switch. Input-only RTC/ADC1 GPIO35 (no output driver, no internal pull resistors, 3.3V max)
12	32K_XP GPIO32	mixed	GPIO32 ADC1_CH4 TOUCH9 XTAL_32K_P	General-purpose 3.3V GPIO32 (NOT 5V tolerant)
13	32K_XN GPIO33	mixed	GPIO33 ADC1_CH5 TOUCH8 XTAL_32K_N	General-purpose 3.3V GPIO33 (NOT 5V tolerant)
14	GPIO25	mixed	GPIO25 ADC2_CH8 DAC_1	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. General-purpose 3.3V GPIO25 (NOT 5V tolerant)
15	GPIO26	mixed	GPIO26 ADC2_CH9 DAC_2	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. General-purpose 3.3V GPIO26 (NOT 5V tolerant)
16	GPIO27	mixed	GPIO27 ADC2_CH7 TOUCH7	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. General-purpose 3.3V GPIO27 (NOT 5V tolerant)
17	MTMS GPIO14	mixed	GPIO14 ADC2_CH6 TOUCH6 HSPICLK MTMS	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. General-purpose 3.3V GPIO14 (NOT 5V tolerant)
18	MTDI GPIO12	mixed	GPIO12 ADC2_CH5 TOUCH5 HSPIQ MTDI	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. [DANGER] VDD_SDIO flash voltage strap (weak pull-down: LOW=3.3V, HIGH=1.8V — boot failure risk!) Pulling GPIO12 (MTDI) HIGH during reset switches internal flash power VDD_SDIO to 1.8V, causing boot brownout/loops on 3.3V flash modules (WROOM-32E, WROVER-E) unless overridden via eFuse. General-purpose 3.3V GPIO12 (NOT 5V tolerant)
19	VDD3P3_RTC	power	VDD3P3_RTC	RTC and low-power analog/I/O domain power supply (2.3V–3.6V)
20	MTCK GPIO13	mixed	GPIO13 ADC2_CH4 TOUCH4 HSPID MTCK	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. General-purpose 3.3V GPIO13 (NOT 5V tolerant)
21	MTDO GPIO15	mixed	GPIO15 ADC2_CH3 TOUCH3 HSPICS0 MTDO	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. [INFO] ROM boot log strapping pin (weak pull-up: HIGH=U0TXD boot log enabled, LOW=silent) Controls early ROM bootloader messages on U0TXD (GPIO1) during reset. General-purpose 3.3V GPIO15 (NOT 5V tolerant)
22	GPIO2	mixed	GPIO2 ADC2_CH2 TOUCH2	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. [CAUTION] Download boot strapping pin (weak pull-down: must be LOW or floating to flash) Must be LOW or left floating when GPIO0 is pulled LOW to enter UART Download Boot. General-purpose 3.3V GPIO2 (NOT 5V tolerant)
23	GPIO0	mixed	GPIO0 ADC2_CH1 TOUCH1	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. [CAUTION] Boot mode strapping pin (weak pull-up: HIGH=SPI Flash Boot, LOW=Download Boot) Sampled at reset. Holding GPIO0 LOW with GPIO2 LOW enters UART0 Download Boot. General-purpose 3.3V GPIO0 (NOT 5V tolerant)
24	GPIO4	mixed	GPIO4 ADC2_CH0 TOUCH0	[CAUTION] ADC2 channel unavailable while Wi-Fi radio is active The Wi-Fi transceiver shares the SAR ADC2 controller. Use ADC1 (GPIO32–GPIO39) whenever Wi-Fi and analog reads run concurrently. General-purpose 3.3V GPIO4 (NOT 5V tolerant)
25	GPIO16	digital	GPIO16 U2RXD	General-purpose 3.3V GPIO16 (NOT 5V tolerant)
26	VDD_SDIO	power	VDD_SDIO	[CAUTION] SPI flash LDO output (1.8V or 3.3V controlled by GPIO12 MTDI strap) Outputs 3.3V (via internal switch from VDD3P3_RTC) when GPIO12=LOW at boot, or 1.8V (internal LDO) when GPIO12=HIGH. Configurable 1.8V / 3.3V power output for external SPI flash/PSRAM
27	GPIO17	digital	GPIO17 U2TXD	General-purpose 3.3V GPIO17 (NOT 5V tolerant)
28	SD_DATA_2 GPIO9	digital	GPIO9 SPIHD	[DANGER] Connected to external Quad SPI Flash (SPIHD/SPIWP) on standard QIO/QOUT designs Occupied by external Quad SPI flash WP#/HOLD# lines unless flash is configured solely in DIO/DOUT mode. General-purpose 3.3V GPIO9 (NOT 5V tolerant)
29	SD_DATA_3 GPIO10	digital	GPIO10 SPIWP	[DANGER] Connected to external Quad SPI Flash (SPIHD/SPIWP) on standard QIO/QOUT designs Occupied by external Quad SPI flash WP#/HOLD# lines unless flash is configured solely in DIO/DOUT mode. General-purpose 3.3V GPIO10 (NOT 5V tolerant)
30	SD_CMD GPIO11	digital	GPIO11 SPICS0	[DANGER] Dedicated SPI0/1 XIP Flash bus — do not use for general I/O Connected to the primary SPI boot flash memory. Driving or loading this pin crashes XIP instruction fetches. General-purpose 3.3V GPIO11 (NOT 5V tolerant)
31	SD_CLK GPIO6	digital	GPIO6 SPICLK	[DANGER] Dedicated SPI0/1 XIP Flash bus — do not use for general I/O Connected to the primary SPI boot flash memory. Driving or loading this pin crashes XIP instruction fetches. General-purpose 3.3V GPIO6 (NOT 5V tolerant)
32	SD_DATA_0 GPIO7	digital	GPIO7 SPIQ	[DANGER] Dedicated SPI0/1 XIP Flash bus — do not use for general I/O Connected to the primary SPI boot flash memory. Driving or loading this pin crashes XIP instruction fetches. General-purpose 3.3V GPIO7 (NOT 5V tolerant)
33	SD_DATA_1 GPIO8	digital	GPIO8 SPID	[DANGER] Dedicated SPI0/1 XIP Flash bus — do not use for general I/O Connected to the primary SPI boot flash memory. Driving or loading this pin crashes XIP instruction fetches. General-purpose 3.3V GPIO8 (NOT 5V tolerant)
34	GPIO5	digital	GPIO5 VSPICS0	[INFO] SDIO Slave timing strapping pin (internal weak pull-up) Sampled at reset only if SDIO Slave mode is used; safe for normal general-purpose output. General-purpose 3.3V GPIO5 (NOT 5V tolerant)
35	GPIO18	digital	GPIO18 VSPICLK	General-purpose 3.3V GPIO18 (NOT 5V tolerant)
36	GPIO23	digital	GPIO23 VSPID	General-purpose 3.3V GPIO23 (NOT 5V tolerant)
37	VDD3P3_CPU	power	VDD3P3_CPU	CPU and digital I/O domain power supply (1.8V–3.6V, 3.3V nominal)
38	GPIO19	digital	GPIO19 VSPIQ U0CTS	General-purpose 3.3V GPIO19 (NOT 5V tolerant)
39	GPIO22	digital	GPIO22 I2C0_SCL U0RTS	General-purpose 3.3V GPIO22 (NOT 5V tolerant)
40	U0RXD GPIO3	digital	GPIO3 U0RXD	[INFO] Default UART0 console & bootloader RX pin Outputs/receives ROM bootloader traffic at reset unless silenced via GPIO15. General-purpose 3.3V GPIO3 (NOT 5V tolerant)
41	U0TXD GPIO1	digital	GPIO1 U0TXD	[INFO] Default UART0 console & bootloader TX pin Outputs/receives ROM bootloader traffic at reset unless silenced via GPIO15. General-purpose 3.3V GPIO1 (NOT 5V tolerant)
42	GPIO21	digital	GPIO21 I2C0_SDA	General-purpose 3.3V GPIO21 (NOT 5V tolerant)
43	VDDA	power	VDDA	Analog, RF, and PLL power supply (2.3V–3.6V, 3.3V nominal)
44	XTAL_N	clock	XTAL_N	[INFO] 40 MHz RF reference crystal negative terminal Dedicated 40 MHz ±10 ppm reference crystal oscillator pin. External 40 MHz crystal oscillator negative pin
45	XTAL_P	clock	XTAL_P	[INFO] 40 MHz RF reference crystal positive terminal Dedicated 40 MHz ±10 ppm reference crystal oscillator pin. External 40 MHz crystal oscillator positive pin
46	VDDA	power	VDDA	Analog, RF, and PLL power supply (2.3V–3.6V, 3.3V nominal)
47	CAP2	special	CAP2	[INFO] Internal PLL filter capacitor network node 2 Connect per Espressif reference schematic RC network between CAP1, CAP2, and GND. Analog PLL loop filter capacitor pin 2
48	CAP1	special	CAP1	[INFO] Internal PLL filter capacitor network node 1 Connect per Espressif reference schematic RC network between CAP1, CAP2, and GND. Analog PLL loop filter capacitor pin 1
49	GND	ground	GND	Exposed central thermal and RF ground pad (0V)