Raspberry Pi Pico 2 W

board
Raspberry Pi Datasheet ↗

Raspberry Pi Pico 2 W combines the dual-core 150 MHz RP2350A MCU (boot-selectable Arm Cortex-M33 with TrustZone or Hazard3 RISC-V cores), 520 KB SRAM, and 4 MB QSPI XIP flash with an Infineon CYW43439 2.4 GHz 802.11n Wi-Fi 4 and Bluetooth 5.2 radio inside the 21×51 mm 40-pin castellated DIP footprint. Twenty-six exposed GPIOs preserve drop-in header compatibility across 2× UART, 2× SPI, 2× I2C, 24 PWM channels, 3× PIO blocks, and 8-lane HSTX (GP12–GP19), while the 3-pin SWD header sits mid-board above the RF shield and GP23–GP25/GP29 manage the CYW43439 gSPI link (routing the user LED to WL_GPIO0). GP0–GP22 FT pads tolerate 5 V only while 3V3/IOVDD is powered; ADC pins GP26–GP28 are strictly 3.3 V max.

Silicon IC: RP2350 Boards / Modules: Raspberry Pi Pico 2 Also known as: Pico 2 WH Raspberry Pi Pico 2 WH RPi Pico 2 W SC1633
LED BOOTSEL 4MB RP2350A M33 / RV32 DEBUG (SWD) CYW43439 Wi-Fi 4 + BLE Pico 2 W 2.4GHz ANT 1 GP0 GPIO0 UART0_TX SPI I2C PWM PIO QSPI USB +8 GPIO0 SPI0_RX UART0_TX I2C0_SDA PWM0_A PIO0 PIO1 PIO2 QMI_CS1n USB_OVCUR_DET 2 GP1 GPIO1 UART0_RX SPI I2C PWM PIO Debug USB +8 GPIO1 SPI0_CSn UART0_RX I2C0_SCL PWM0_B PIO0 PIO1 PIO2 TRACECLK USB_VBUS_DET 3 GND GND GND 4 GP2 GPIO2 SPI UART I2C PWM PIO Debug USB +10 GPIO2 SPI0_SCK UART0_CTS UART0_TX I2C1_SDA PWM1_A PIO0 PIO1 PIO2 TRACEDATA0 USB_VBUS_EN 5 GP3 GPIO3 SPI UART I2C PWM PIO Debug USB +10 GPIO3 SPI0_TX UART0_RTS UART0_RX I2C1_SCL PWM1_B PIO0 PIO1 PIO2 TRACEDATA1 USB_OVCUR_DET 6 GP4 GPIO4 I2C0_SDA SPI UART PWM PIO Debug USB +8 GPIO4 SPI0_RX UART1_TX I2C0_SDA PWM2_A PIO0 PIO1 PIO2 TRACEDATA2 USB_VBUS_DET 7 GP5 GPIO5 I2C0_SCL SPI UART PWM PIO Debug USB +8 GPIO5 SPI0_CSn UART1_RX I2C0_SCL PWM2_B PIO0 PIO1 PIO2 TRACEDATA3 USB_VBUS_EN 8 GND GND GND 9 GP6 GPIO6 SPI UART I2C PWM PIO USB +9 GPIO6 SPI0_SCK UART1_CTS UART1_TX I2C1_SDA PWM3_A PIO0 PIO1 PIO2 USB_OVCUR_DET 10 GP7 GPIO7 SPI UART I2C PWM PIO USB +9 GPIO7 SPI0_TX UART1_RTS UART1_RX I2C1_SCL PWM3_B PIO0 PIO1 PIO2 USB_VBUS_DET 11 GP8 GPIO8 SPI UART I2C PWM PIO QSPI USB +9 GPIO8 SPI1_RX UART1_TX I2C0_SDA PWM4_A PIO0 PIO1 PIO2 QMI_CS1n USB_VBUS_EN 12 GP9 GPIO9 SPI UART I2C PWM PIO USB +8 GPIO9 SPI1_CSn UART1_RX I2C0_SCL PWM4_B PIO0 PIO1 PIO2 USB_OVCUR_DET 13 GND GND GND 14 GP10 GPIO10 SPI UART I2C PWM PIO USB +9 GPIO10 SPI1_SCK UART1_CTS UART1_TX I2C1_SDA PWM5_A PIO0 PIO1 PIO2 USB_VBUS_DET 15 GP11 GPIO11 SPI UART I2C PWM PIO USB +9 GPIO11 SPI1_TX UART1_RTS UART1_RX I2C1_SCL PWM5_B PIO0 PIO1 PIO2 USB_VBUS_EN 16 GP12 GPIO12 System SPI UART I2C PWM PIO Clock USB +10 GPIO12 HSTX0 SPI1_RX UART0_TX I2C0_SDA PWM6_A PIO0 PIO1 PIO2 CLOCK_GPIN0 USB_OVCUR_DET 17 GP13 GPIO13 System SPI UART I2C PWM PIO Clock USB +10 GPIO13 HSTX1 SPI1_CSn UART0_RX I2C0_SCL PWM6_B PIO0 PIO1 PIO2 CLOCK_GPOUT0 USB_VBUS_DET 18 GND GND GND 19 GP14 GPIO14 System SPI UART I2C PWM PIO Clock USB +11 GPIO14 HSTX2 SPI1_SCK UART0_CTS UART0_TX I2C1_SDA PWM7_A PIO0 PIO1 PIO2 CLOCK_GPIN1 USB_VBUS_EN 20 GP15 GPIO15 System SPI UART I2C PWM PIO Clock USB +11 GPIO15 HSTX3 SPI1_TX UART0_RTS UART0_RX I2C1_SCL PWM7_B PIO0 PIO1 PIO2 CLOCK_GPOUT1 USB_OVCUR_DET 21 GP16 GPIO16 SPI0_RX System UART I2C PWM PIO USB +8 GPIO16 HSTX4 SPI0_RX UART0_TX I2C0_SDA PWM0_A PIO0 PIO1 PIO2 USB_VBUS_DET 22 GP17 GPIO17 System SPI UART I2C PWM PIO USB +9 GPIO17 HSTX5 SPI0_CSn UART0_RX I2C0_SCL PWM0_B PIO0 PIO1 PIO2 USB_VBUS_EN 23 GND GND GND 24 GP18 GPIO18 SPI0_SCK System UART I2C PWM PIO USB +9 GPIO18 HSTX6 SPI0_SCK UART0_CTS UART0_TX I2C1_SDA PWM1_A PIO0 PIO1 PIO2 USB_OVCUR_DET 25 GP19 GPIO19 SPI0_TX System UART I2C PWM PIO QSPI USB +10 GPIO19 HSTX7 SPI0_TX UART0_RTS UART0_RX I2C1_SCL PWM1_B PIO0 PIO1 PIO2 QMI_CS1n USB_VBUS_DET 26 GP20 GPIO20 SPI UART I2C PWM PIO Clock USB +9 GPIO20 SPI0_RX UART1_TX I2C0_SDA PWM2_A PIO0 PIO1 PIO2 CLOCK_GPIN0 USB_VBUS_EN 27 GP21 GPIO21 SPI UART I2C PWM PIO Clock USB +9 GPIO21 SPI0_CSn UART1_RX I2C0_SCL PWM2_B PIO0 PIO1 PIO2 CLOCK_GPOUT0 USB_OVCUR_DET 28 GND GND GND 29 GP22 GPIO22 SPI UART I2C PWM PIO Clock USB +10 GPIO22 SPI0_SCK UART1_CTS UART1_TX I2C1_SDA PWM3_A PIO0 PIO1 PIO2 CLOCK_GPIN1 USB_VBUS_DET 30 RUN ! RUN RUN 31 GP26 ! ADC0 I2C1_SDA GPIO SPI UART PWM PIO USB +9 ADC0 GPIO26 SPI1_SCK UART1_CTS UART1_TX I2C1_SDA PWM5_A PIO0 PIO1 PIO2 USB_VBUS_EN 32 GP27 ! ADC1 I2C1_SCL GPIO SPI UART PWM PIO USB +9 ADC1 GPIO27 SPI1_TX UART1_RTS UART1_RX I2C1_SCL PWM5_B PIO0 PIO1 PIO2 USB_OVCUR_DET 33 AGND ! AGND AGND 34 GP28 ! ADC2 GPIO SPI UART I2C PWM PIO USB +9 ADC2 GPIO28 SPI1_RX UART0_TX I2C0_SDA PWM6_A PIO0 PIO1 PIO2 USB_VBUS_DET 35 ADC_VREF ! ADC_VREF ADC_VREF 36 3V3(OUT) ! 3V3_OUT 3V3_OUT 37 3V3_EN ! 3V3_EN 3V3_EN 38 GND GND GND 39 VSYS ! VSYS VSYS 40 VBUS ! VBUS_5V VBUS_5V D1 SWCLK ! SWCLK SWCLK D2 GND GND GND D3 SWDIO ! SWDIO SWDIO

Onboard Peripherals & Internal Signals

WL_GPIO0 (LED) GPIO
Onboard green user LED driven by CYW43439 WL_GPIO0 (NOT RP2350 GP25!)

Connected to WL_GPIO0 on the Infineon CYW43439 wireless chip rather than RP2350A GPIO25; toggle via the CYW43 driver (e.g. cyw43_arch_gpio_put or Pin('LED') in MicroPython).

GP23 (WL_ON) System
Chip Pad: GPIO23
CYW43439 wireless power-on enable (active HIGH)

Internal RP2350A output enabling the Infineon CYW43439 Wi-Fi/BLE radio PMU.

GP24 (WL_DATA / IRQ) SPI
Chip Pad: GPIO24
CYW43439 bidirectional 3-wire gSPI data I/O and host IRQ

Internal RP2350A pad multiplexed as bidirectional SPI data and host interrupt request for the CYW43439 radio.

GP25 (WL_CS) SPI
Chip Pad: GPIO25
CYW43439 gSPI chip select (active LOW) & VSYS divider FET gate

Drives active-low SPI CS for CYW43439 and gates FET Q1 for the VSYS/3 divider. Drive HIGH (wireless SPI idle) when sampling VSYS/3 on ADC3.

GP29 / ADC3 (WL_CLK & VSYS/3) ADC
Chip Pad: GPIO29
Shared CYW43439 gSPI clock and FET-gated VSYS ÷ 3 ADC3 monitor

Shared between CYW43439 SPI clock (WL_CLK) and the 200kΩ/100kΩ VSYS/3 divider via FET Q1. Pause wireless SPI (GP25 HIGH) before reading ADC3.

WL_GPIO1 (SMPS PS) Power
RT6154A buck-boost Power Save mode (LOW=PFM efficiency, HIGH=PWM low ripple)

Driven by CYW43439 WL_GPIO1 to switch the RT6154A regulator between light-load PFM and low-ripple fixed-frequency PWM.

WL_GPIO2 (VBUS Sense) Power
Reads HIGH via CYW43439 WL_GPIO2 when 5V USB VBUS is connected

Voltage-divided 5V USB VBUS sense input wired to CYW43439 WL_GPIO2.

BOOTSEL QSPI
Chip Pad: QSPI_SS
White push-button pulling QSPI_SS LOW at reset to enter ROM UF2/PICOBOOT USB bootloader

Tactile push-button on QSPI_SS. Holding BOOTSEL across reset enters the RP2350 ROM UF2/PICOBOOT bootloader.

Pin Assignment Planner

Add the peripherals you need and plan the pin assignments

Full Pin Reference (43 Pins)

Pin # Label Type Functions Warnings & Notes
1 GP0 GPIO0 digital GPIO0 SPI0_RX UART0_TX I2C0_SDA PWM0_A PIO0 PIO1 PIO2 QMI_CS1n USB_OVCUR_DET
RP2350 Bank 0 GPIO0 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
2 GP1 GPIO1 digital GPIO1 SPI0_CSn UART0_RX I2C0_SCL PWM0_B PIO0 PIO1 PIO2 TRACECLK USB_VBUS_DET
RP2350 Bank 0 GPIO1 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
3 GND ground GND
System digital ground (0V)
4 GP2 GPIO2 digital GPIO2 SPI0_SCK UART0_CTS UART0_TX I2C1_SDA PWM1_A PIO0 PIO1 PIO2 TRACEDATA0 USB_VBUS_EN
RP2350 Bank 0 GPIO2 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
5 GP3 GPIO3 digital GPIO3 SPI0_TX UART0_RTS UART0_RX I2C1_SCL PWM1_B PIO0 PIO1 PIO2 TRACEDATA1 USB_OVCUR_DET
RP2350 Bank 0 GPIO3 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
6 GP4 GPIO4 digital GPIO4 SPI0_RX UART1_TX I2C0_SDA PWM2_A PIO0 PIO1 PIO2 TRACEDATA2 USB_VBUS_DET
RP2350 Bank 0 GPIO4 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
7 GP5 GPIO5 digital GPIO5 SPI0_CSn UART1_RX I2C0_SCL PWM2_B PIO0 PIO1 PIO2 TRACEDATA3 USB_VBUS_EN
RP2350 Bank 0 GPIO5 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
8 GND ground GND
System digital ground (0V)
9 GP6 GPIO6 digital GPIO6 SPI0_SCK UART1_CTS UART1_TX I2C1_SDA PWM3_A PIO0 PIO1 PIO2 USB_OVCUR_DET
RP2350 Bank 0 GPIO6 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
10 GP7 GPIO7 digital GPIO7 SPI0_TX UART1_RTS UART1_RX I2C1_SCL PWM3_B PIO0 PIO1 PIO2 USB_VBUS_DET
RP2350 Bank 0 GPIO7 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
11 GP8 GPIO8 digital GPIO8 SPI1_RX UART1_TX I2C0_SDA PWM4_A PIO0 PIO1 PIO2 QMI_CS1n USB_VBUS_EN
RP2350 Bank 0 GPIO8 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
12 GP9 GPIO9 digital GPIO9 SPI1_CSn UART1_RX I2C0_SCL PWM4_B PIO0 PIO1 PIO2 USB_OVCUR_DET
RP2350 Bank 0 GPIO9 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
13 GND ground GND
System digital ground (0V)
14 GP10 GPIO10 digital GPIO10 SPI1_SCK UART1_CTS UART1_TX I2C1_SDA PWM5_A PIO0 PIO1 PIO2 USB_VBUS_DET
RP2350 Bank 0 GPIO10 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
15 GP11 GPIO11 digital GPIO11 SPI1_TX UART1_RTS UART1_RX I2C1_SCL PWM5_B PIO0 PIO1 PIO2 USB_VBUS_EN
RP2350 Bank 0 GPIO11 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
16 GP12 GPIO12 digital GPIO12 HSTX0 SPI1_RX UART0_TX I2C0_SDA PWM6_A PIO0 PIO1 PIO2 CLOCK_GPIN0 USB_OVCUR_DET
RP2350 Bank 0 GPIO12 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
17 GP13 GPIO13 digital GPIO13 HSTX1 SPI1_CSn UART0_RX I2C0_SCL PWM6_B PIO0 PIO1 PIO2 CLOCK_GPOUT0 USB_VBUS_DET
RP2350 Bank 0 GPIO13 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
18 GND ground GND
System digital ground (0V)
19 GP14 GPIO14 digital GPIO14 HSTX2 SPI1_SCK UART0_CTS UART0_TX I2C1_SDA PWM7_A PIO0 PIO1 PIO2 CLOCK_GPIN1 USB_VBUS_EN
RP2350 Bank 0 GPIO14 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
20 GP15 GPIO15 digital GPIO15 HSTX3 SPI1_TX UART0_RTS UART0_RX I2C1_SCL PWM7_B PIO0 PIO1 PIO2 CLOCK_GPOUT1 USB_OVCUR_DET
RP2350 Bank 0 GPIO15 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
21 GP16 GPIO16 digital GPIO16 HSTX4 SPI0_RX UART0_TX I2C0_SDA PWM0_A PIO0 PIO1 PIO2 USB_VBUS_DET
RP2350 Bank 0 GPIO16 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
22 GP17 GPIO17 digital GPIO17 HSTX5 SPI0_CSn UART0_RX I2C0_SCL PWM0_B PIO0 PIO1 PIO2 USB_VBUS_EN
RP2350 Bank 0 GPIO17 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
23 GND ground GND
System digital ground (0V)
24 GP18 GPIO18 digital GPIO18 HSTX6 SPI0_SCK UART0_CTS UART0_TX I2C1_SDA PWM1_A PIO0 PIO1 PIO2 USB_OVCUR_DET
RP2350 Bank 0 GPIO18 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
25 GP19 GPIO19 digital GPIO19 HSTX7 SPI0_TX UART0_RTS UART0_RX I2C1_SCL PWM1_B PIO0 PIO1 PIO2 QMI_CS1n USB_VBUS_DET
RP2350 Bank 0 GPIO19 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
26 GP20 GPIO20 digital GPIO20 SPI0_RX UART1_TX I2C0_SDA PWM2_A PIO0 PIO1 PIO2 CLOCK_GPIN0 USB_VBUS_EN
RP2350 Bank 0 GPIO20 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
27 GP21 GPIO21 digital GPIO21 SPI0_CSn UART1_RX I2C0_SCL PWM2_B PIO0 PIO1 PIO2 CLOCK_GPOUT0 USB_OVCUR_DET
RP2350 Bank 0 GPIO21 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
28 GND ground GND
System digital ground (0V)
29 GP22 GPIO22 digital GPIO22 SPI0_SCK UART1_CTS UART1_TX I2C1_SDA PWM3_A PIO0 PIO1 PIO2 CLOCK_GPIN1 USB_VBUS_DET
RP2350 Bank 0 GPIO22 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
30 RUN reset RUN
[INFO] Active-low global hardware reset (pull LOW to reset RP2350)
Global asynchronous active-low reset pin. Drive LOW to reset RP2350; tie to IOVDD or pull HIGH via 10kΩ for normal operation.
Ref: RP2350 Datasheet §1.2.2 Table 2, §14.8.2 Table 1677
Global asynchronous active-low reset
31 GP26 GPIO26 mixed ADC0 GPIO26 SPI1_SCK UART1_CTS UART1_TX I2C1_SDA PWM5_A PIO0 PIO1 PIO2 USB_VBUS_EN
[CAUTION] ADC pad — strictly NOT 5V tolerant (3.63V max, ESD diode to IOVDD)
Unlike RP2350 digital FT pads, ADC-capable STD pads (GPIO26–29 on RP2350A; GPIO40–47 on RP2350B) incorporate an ESD clamp diode to IOVDD and are strictly NOT 5V tolerant (3.63V max; do not drive while unpowered). Disable the digital input buffer in firmware when sampling ADC, and note stepping A2 erratum RP2350-E9.
Ref: RP2350 Datasheet §14.8.2 Table 1674, §14.9.1 Table 1680; Appendix D.5.1 RP2350-E9
RP2350A ADC input 0 / GPIO26 (STD pad with ESD diode to IOVDD — strictly NOT 5V tolerant, 3.63V max)
32 GP27 GPIO27 mixed ADC1 GPIO27 SPI1_TX UART1_RTS UART1_RX I2C1_SCL PWM5_B PIO0 PIO1 PIO2 USB_OVCUR_DET
[CAUTION] ADC pad — strictly NOT 5V tolerant (3.63V max, ESD diode to IOVDD)
Unlike RP2350 digital FT pads, ADC-capable STD pads (GPIO26–29 on RP2350A; GPIO40–47 on RP2350B) incorporate an ESD clamp diode to IOVDD and are strictly NOT 5V tolerant (3.63V max; do not drive while unpowered). Disable the digital input buffer in firmware when sampling ADC, and note stepping A2 erratum RP2350-E9.
Ref: RP2350 Datasheet §14.8.2 Table 1674, §14.9.1 Table 1680; Appendix D.5.1 RP2350-E9
RP2350A ADC input 1 / GPIO27 (STD pad with ESD diode to IOVDD — strictly NOT 5V tolerant, 3.63V max)
33 AGND ground AGND
[INFO] Isolated analog ground return
Low-noise analog ground return path for RP2350A SAR ADC measurements (minimizes digital switching and RF TX burst noise).
34 GP28 GPIO28 mixed ADC2 GPIO28 SPI1_RX UART0_TX I2C0_SDA PWM6_A PIO0 PIO1 PIO2 USB_VBUS_DET
[CAUTION] ADC pad — strictly NOT 5V tolerant (3.63V max, ESD diode to IOVDD)
Unlike RP2350 digital FT pads, ADC-capable STD pads (GPIO26–29 on RP2350A; GPIO40–47 on RP2350B) incorporate an ESD clamp diode to IOVDD and are strictly NOT 5V tolerant (3.63V max; do not drive while unpowered). Disable the digital input buffer in firmware when sampling ADC, and note stepping A2 erratum RP2350-E9.
Ref: RP2350 Datasheet §14.8.2 Table 1674, §14.9.1 Table 1680; Appendix D.5.1 RP2350-E9
RP2350A ADC input 2 / GPIO28 (STD pad with ESD diode to IOVDD — strictly NOT 5V tolerant, 3.63V max)
35 ADC_VREF power ADC_VREF
[INFO] Filtered 3.3V ADC reference via 200Ω resistor
ADC reference voltage pin fed from the 3.3V rail via an RC filter (200Ω series resistor). Can be clamped by an external precision shunt reference.
36 3V3(OUT) power 3V3_OUT
[CAUTION] Max ~300mA recommended external load
Main 3.3V regulated rail from the onboard Richtek RT6154A buck-boost SMPS. Keep external continuous draw under ~300mA to leave headroom for CYW43439 Wi-Fi TX bursts.
37 3V3_EN reset 3V3_EN
[INFO] Pull LOW to shut down 3.3V SMPS regulator
Enables the onboard RT6154A buck-boost regulator (pulled HIGH to VSYS by 100kΩ). Pull to GND to power down the 3.3V rail.
38 GND ground GND
System digital ground (0V)
39 VSYS power VSYS
[CAUTION] 1.8V–5.5V main input; add external Schottky diode when dual-powering alongside USB
Main system supply input feeding the onboard RT6154A buck-boost SMPS (1.8V to 5.5V). Use an external power-ORing Schottky diode or P-MOSFET when combining battery/external power with USB VBUS.
40 VBUS power VBUS_5V
[CAUTION] Unregulated 5V from Micro-USB — NEVER apply to GP26–GP28 ADC pins (3.63V max)
Direct 5V rail from Micro-USB connector. While GP0–GP22 FT digital pads tolerate 5V ONLY when 3V3/IOVDD is powered, GP26–GP28 ADC pads are strictly NOT 5V tolerant!
D1 SWCLK digital SWCLK
[INFO] Dedicated CoreSight SWD debug clock
Multi-drop Serial Wire Debug clock providing debug access to both Arm Cortex-M33 and Hazard3 RISC-V cores.
Ref: RP2350 Datasheet §1.2.2 Table 2, §14.8.2 Table 1677, Table 1687
Serial Wire Debug Clock
D2 GND ground GND
System digital ground (0V)
D3 SWDIO digital SWDIO
[INFO] Dedicated CoreSight SWD debug data I/O
Multi-drop Serial Wire Debug bidirectional data line providing debug access to both Arm Cortex-M33 and Hazard3 RISC-V cores.
Ref: RP2350 Datasheet §1.2.2 Table 2, §14.8.2 Table 1677
Serial Wire Debug Data I/O