GP25 (LED)
GPIO
Chip Pad: GPIO25
Onboard green user LED (active HIGH)
Connected to RP2350A GPIO25 via current-limiting resistor. Drive HIGH to illuminate.
Raspberry Pi Pico 2 upgrades the classic 21×51 mm 40-pin castellated DIP form factor to the dual-core 150 MHz RP2350A MCU (boot-selectable Arm Cortex-M33 with FPU/DSP/TrustZone or Hazard3 RISC-V cores), 520 KB of SRAM, and 4 MB of onboard QSPI XIP flash while preserving drop-in pin compatibility with the original Pico. Twenty-six exposed GPIOs support 2× UART, 2× SPI, 2× I2C, 24 PWM channels, 3× PIO blocks (12 state machines), and 8-lane HSTX on GP12–GP19, backed by an RT6150B 1.8 V–5.5 V buck-boost SMPS. Digital pins GP0–GP22 use fault-tolerant FT pads (5 V-tolerant only while 3V3/IOVDD is powered), whereas analog inputs GP26–GP28 (12-bit SAR ADC) remain strictly 3.3 V max (non-5V-tolerant).
Onboard Peripherals & Internal Signals
GP23 (SMPS PS)
Power
Chip Pad: GPIO23
RT6150B buck-boost Power Save mode (LOW=PFM efficiency, HIGH=PWM low ripple)
Controls the RT6150B PS pin. Drive HIGH for fixed-frequency PWM mode (reduces supply ripple during ADC reads); LOW enables light-load PFM mode.
GP24 (VBUS Sense)
Power
Chip Pad: GPIO24
Reads HIGH (~3.2V via divider) when 5V USB VBUS is present
Connected to 5V USB VBUS through a 5.6kΩ / 10kΩ resistor divider (~3.2V) so firmware can detect USB host power.
GP29 / ADC3 (VSYS/3)
ADC
Chip Pad: GPIO29
Measures VSYS ÷ 3 via onboard FET-gated 3×100kΩ divider (R5/R6/R16 + DMG1012T)
Samples one-third of the VSYS supply rail on ADC3 (GPIO29) for battery/input voltage monitoring; Q1 (DMG1012T) isolates ADC3 when 3V3 is off.
BOOTSEL
QSPI
Chip Pad: QSPI_SS
White push-button pulling QSPI_SS LOW at reset to enter ROM UF2/PICOBOOT USB bootloader
Tactile push-button on QSPI_SS. Holding BOOTSEL across reset enters the RP2350 ROM UF2/PICOBOOT bootloader.
Pin Assignment Planner
Add the peripherals you need and plan the pin assignments
Full Pin Reference (43 Pins)
| Pin # | Label | Type | Functions | Warnings & Notes |
|---|---|---|---|---|
| 1 | GP0 GPIO0 | digital | GPIO0 SPI0_RX UART0_TX I2C0_SDA PWM0_A PIO0 PIO1 PIO2 QMI_CS1n USB_OVCUR_DET |
RP2350 Bank 0 GPIO0 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 2 | GP1 GPIO1 | digital | GPIO1 SPI0_CSn UART0_RX I2C0_SCL PWM0_B PIO0 PIO1 PIO2 TRACECLK USB_VBUS_DET |
RP2350 Bank 0 GPIO1 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 3 | GND | ground | GND |
System digital ground (0V)
|
| 4 | GP2 GPIO2 | digital | GPIO2 SPI0_SCK UART0_CTS UART0_TX I2C1_SDA PWM1_A PIO0 PIO1 PIO2 TRACEDATA0 USB_VBUS_EN |
RP2350 Bank 0 GPIO2 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 5 | GP3 GPIO3 | digital | GPIO3 SPI0_TX UART0_RTS UART0_RX I2C1_SCL PWM1_B PIO0 PIO1 PIO2 TRACEDATA1 USB_OVCUR_DET |
RP2350 Bank 0 GPIO3 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 6 | GP4 GPIO4 | digital | GPIO4 SPI0_RX UART1_TX I2C0_SDA PWM2_A PIO0 PIO1 PIO2 TRACEDATA2 USB_VBUS_DET |
RP2350 Bank 0 GPIO4 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 7 | GP5 GPIO5 | digital | GPIO5 SPI0_CSn UART1_RX I2C0_SCL PWM2_B PIO0 PIO1 PIO2 TRACEDATA3 USB_VBUS_EN |
RP2350 Bank 0 GPIO5 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 8 | GND | ground | GND |
System digital ground (0V)
|
| 9 | GP6 GPIO6 | digital | GPIO6 SPI0_SCK UART1_CTS UART1_TX I2C1_SDA PWM3_A PIO0 PIO1 PIO2 USB_OVCUR_DET |
RP2350 Bank 0 GPIO6 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 10 | GP7 GPIO7 | digital | GPIO7 SPI0_TX UART1_RTS UART1_RX I2C1_SCL PWM3_B PIO0 PIO1 PIO2 USB_VBUS_DET |
RP2350 Bank 0 GPIO7 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 11 | GP8 GPIO8 | digital | GPIO8 SPI1_RX UART1_TX I2C0_SDA PWM4_A PIO0 PIO1 PIO2 QMI_CS1n USB_VBUS_EN |
RP2350 Bank 0 GPIO8 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 12 | GP9 GPIO9 | digital | GPIO9 SPI1_CSn UART1_RX I2C0_SCL PWM4_B PIO0 PIO1 PIO2 USB_OVCUR_DET |
RP2350 Bank 0 GPIO9 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 13 | GND | ground | GND |
System digital ground (0V)
|
| 14 | GP10 GPIO10 | digital | GPIO10 SPI1_SCK UART1_CTS UART1_TX I2C1_SDA PWM5_A PIO0 PIO1 PIO2 USB_VBUS_DET |
RP2350 Bank 0 GPIO10 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 15 | GP11 GPIO11 | digital | GPIO11 SPI1_TX UART1_RTS UART1_RX I2C1_SCL PWM5_B PIO0 PIO1 PIO2 USB_VBUS_EN |
RP2350 Bank 0 GPIO11 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 16 | GP12 GPIO12 | digital | GPIO12 HSTX0 SPI1_RX UART0_TX I2C0_SDA PWM6_A PIO0 PIO1 PIO2 CLOCK_GPIN0 USB_OVCUR_DET |
RP2350 Bank 0 GPIO12 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 17 | GP13 GPIO13 | digital | GPIO13 HSTX1 SPI1_CSn UART0_RX I2C0_SCL PWM6_B PIO0 PIO1 PIO2 CLOCK_GPOUT0 USB_VBUS_DET |
RP2350 Bank 0 GPIO13 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 18 | GND | ground | GND |
System digital ground (0V)
|
| 19 | GP14 GPIO14 | digital | GPIO14 HSTX2 SPI1_SCK UART0_CTS UART0_TX I2C1_SDA PWM7_A PIO0 PIO1 PIO2 CLOCK_GPIN1 USB_VBUS_EN |
RP2350 Bank 0 GPIO14 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 20 | GP15 GPIO15 | digital | GPIO15 HSTX3 SPI1_TX UART0_RTS UART0_RX I2C1_SCL PWM7_B PIO0 PIO1 PIO2 CLOCK_GPOUT1 USB_OVCUR_DET |
RP2350 Bank 0 GPIO15 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 21 | GP16 GPIO16 | digital | GPIO16 HSTX4 SPI0_RX UART0_TX I2C0_SDA PWM0_A PIO0 PIO1 PIO2 USB_VBUS_DET |
RP2350 Bank 0 GPIO16 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 22 | GP17 GPIO17 | digital | GPIO17 HSTX5 SPI0_CSn UART0_RX I2C0_SCL PWM0_B PIO0 PIO1 PIO2 USB_VBUS_EN |
RP2350 Bank 0 GPIO17 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 23 | GND | ground | GND |
System digital ground (0V)
|
| 24 | GP18 GPIO18 | digital | GPIO18 HSTX6 SPI0_SCK UART0_CTS UART0_TX I2C1_SDA PWM1_A PIO0 PIO1 PIO2 USB_OVCUR_DET |
RP2350 Bank 0 GPIO18 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 25 | GP19 GPIO19 | digital | GPIO19 HSTX7 SPI0_TX UART0_RTS UART0_RX I2C1_SCL PWM1_B PIO0 PIO1 PIO2 QMI_CS1n USB_VBUS_DET |
RP2350 Bank 0 GPIO19 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 26 | GP20 GPIO20 | digital | GPIO20 SPI0_RX UART1_TX I2C0_SDA PWM2_A PIO0 PIO1 PIO2 CLOCK_GPIN0 USB_VBUS_EN |
RP2350 Bank 0 GPIO20 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 27 | GP21 GPIO21 | digital | GPIO21 SPI0_CSn UART1_RX I2C0_SCL PWM2_B PIO0 PIO1 PIO2 CLOCK_GPOUT0 USB_OVCUR_DET |
RP2350 Bank 0 GPIO21 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 28 | GND | ground | GND |
System digital ground (0V)
|
| 29 | GP22 GPIO22 | digital | GPIO22 SPI0_SCK UART1_CTS UART1_TX I2C1_SDA PWM3_A PIO0 PIO1 PIO2 CLOCK_GPIN1 USB_VBUS_DET |
RP2350 Bank 0 GPIO22 (FT pad: 5V-tolerant up to 5.5V ONLY while IOVDD is powered at ~3.3V; max 3.63V when unpowered; stepping A2 erratum RP2350-E9 on internal pull-downs, fixed in A3)
|
| 30 | RUN | reset | RUN |
[INFO] Active-low global hardware reset (pull LOW to reset RP2350)
Global asynchronous active-low reset pin. Drive LOW to reset RP2350; tie to IOVDD or pull HIGH via 10kΩ for normal operation.
Ref: RP2350 Datasheet §1.2.2 Table 2, §14.8.2 Table 1677
Global asynchronous active-low reset
|
| 31 | GP26 GPIO26 | mixed | ADC0 GPIO26 SPI1_SCK UART1_CTS UART1_TX I2C1_SDA PWM5_A PIO0 PIO1 PIO2 USB_VBUS_EN |
[CAUTION] ADC pad — strictly NOT 5V tolerant (3.63V max, ESD diode to IOVDD)
Unlike RP2350 digital FT pads, ADC-capable STD pads (GPIO26–29 on RP2350A; GPIO40–47 on RP2350B) incorporate an ESD clamp diode to IOVDD and are strictly NOT 5V tolerant (3.63V max; do not drive while unpowered). Disable the digital input buffer in firmware when sampling ADC, and note stepping A2 erratum RP2350-E9.
Ref: RP2350 Datasheet §14.8.2 Table 1674, §14.9.1 Table 1680; Appendix D.5.1 RP2350-E9
RP2350A ADC input 0 / GPIO26 (STD pad with ESD diode to IOVDD — strictly NOT 5V tolerant, 3.63V max)
|
| 32 | GP27 GPIO27 | mixed | ADC1 GPIO27 SPI1_TX UART1_RTS UART1_RX I2C1_SCL PWM5_B PIO0 PIO1 PIO2 USB_OVCUR_DET |
[CAUTION] ADC pad — strictly NOT 5V tolerant (3.63V max, ESD diode to IOVDD)
Unlike RP2350 digital FT pads, ADC-capable STD pads (GPIO26–29 on RP2350A; GPIO40–47 on RP2350B) incorporate an ESD clamp diode to IOVDD and are strictly NOT 5V tolerant (3.63V max; do not drive while unpowered). Disable the digital input buffer in firmware when sampling ADC, and note stepping A2 erratum RP2350-E9.
Ref: RP2350 Datasheet §14.8.2 Table 1674, §14.9.1 Table 1680; Appendix D.5.1 RP2350-E9
RP2350A ADC input 1 / GPIO27 (STD pad with ESD diode to IOVDD — strictly NOT 5V tolerant, 3.63V max)
|
| 33 | AGND | ground | AGND |
[INFO] Isolated analog ground return
Low-noise analog ground return path for RP2350A SAR ADC measurements (minimizes digital switching noise).
Ref: Raspberry Pi Pico 2 Datasheet §3.1 (PIN33 AGND)
|
| 34 | GP28 GPIO28 | mixed | ADC2 GPIO28 SPI1_RX UART0_TX I2C0_SDA PWM6_A PIO0 PIO1 PIO2 USB_VBUS_DET |
[CAUTION] ADC pad — strictly NOT 5V tolerant (3.63V max, ESD diode to IOVDD)
Unlike RP2350 digital FT pads, ADC-capable STD pads (GPIO26–29 on RP2350A; GPIO40–47 on RP2350B) incorporate an ESD clamp diode to IOVDD and are strictly NOT 5V tolerant (3.63V max; do not drive while unpowered). Disable the digital input buffer in firmware when sampling ADC, and note stepping A2 erratum RP2350-E9.
Ref: RP2350 Datasheet §14.8.2 Table 1674, §14.9.1 Table 1680; Appendix D.5.1 RP2350-E9
RP2350A ADC input 2 / GPIO28 (STD pad with ESD diode to IOVDD — strictly NOT 5V tolerant, 3.63V max)
|
| 35 | ADC_VREF | power | ADC_VREF |
[INFO] Filtered 3.3V ADC reference via 200Ω resistor
ADC reference voltage pin fed from the 3.3V rail via an RC filter (200Ω series resistor). Can be clamped by an external precision shunt reference.
Ref: Raspberry Pi Pico 2 Datasheet §5.3, Appendix B Figure 11
|
| 36 | 3V3(OUT) | power | 3V3_OUT |
[CAUTION] Max ~300mA recommended external load
Main 3.3V regulated rail from the onboard Richtek RT6150B buck-boost SMPS. Keep external continuous draw under ~300mA depending on VSYS voltage.
Ref: Raspberry Pi Pico 2 Datasheet §3.1 (PIN36 3V3)
|
| 37 | 3V3_EN | reset | 3V3_EN |
[INFO] Pull LOW to shut down 3.3V SMPS regulator
Enables the onboard RT6150B buck-boost regulator (pulled HIGH to VSYS by 100kΩ). Pull to GND to power down the 3.3V rail.
Ref: Raspberry Pi Pico 2 Datasheet §3.1 (PIN37 3V3_EN)
|
| 38 | GND | ground | GND |
System digital ground (0V)
|
| 39 | VSYS | power | VSYS |
[CAUTION] 1.8V–5.5V main input; add external Schottky diode when dual-powering alongside USB
Main system supply input feeding the onboard RT6150B buck-boost SMPS (1.8V to 5.5V). Use an external power-ORing Schottky diode or P-MOSFET when combining battery/external power with USB VBUS.
Ref: Raspberry Pi Pico 2 Datasheet §3.1, §5.5 Figure 8
|
| 40 | VBUS | power | VBUS_5V |
[CAUTION] Unregulated 5V from Micro-USB — NEVER apply to GP26–GP28 ADC pins (3.63V max)
Direct 5V rail from Micro-USB connector. While GP0–GP22 FT digital pads tolerate 5V ONLY when 3V3/IOVDD is powered, GP26–GP28 ADC pads are strictly NOT 5V tolerant!
Ref: Raspberry Pi Pico 2 Datasheet §3.1, §5.2; RP2350 Datasheet §14.9.1 Table 1680
|
| D1 | SWCLK | digital | SWCLK |
[INFO] Dedicated CoreSight SWD debug clock
Multi-drop Serial Wire Debug clock providing debug access to both Arm Cortex-M33 and Hazard3 RISC-V cores.
Ref: RP2350 Datasheet §1.2.2 Table 2, §14.8.2 Table 1677, Table 1687
Serial Wire Debug Clock
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| D2 | GND | ground | GND |
System digital ground (0V)
|
| D3 | SWDIO | digital | SWDIO |
[INFO] Dedicated CoreSight SWD debug data I/O
Multi-drop Serial Wire Debug bidirectional data line providing debug access to both Arm Cortex-M33 and Hazard3 RISC-V cores.
Ref: RP2350 Datasheet §1.2.2 Table 2, §14.8.2 Table 1677
Serial Wire Debug Data I/O
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